Submission Open for Jan-Dec-2024 |
Last Date of Submission : |
20th, April-2024 |
Acceptance Notification : |
After Peer Review |
Last Date of Publication : |
30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
S.NO | TITLE | PAGE NO | DOWNLOAD | |
IJVDCS 91 | Digitally Controlled Pulse Width Modulator for On-Chip Power Management Authors:V. SHIVA KUMAR, DEVIREDDY VENKATARAMI REDDY |
0475-0481 |
Download | |
IJVDCS 92 | Implementation of Testable Reversible Sequential Circuit on FPGA Authors:MOHD NAJEED ASHHER, K. HYMAVATHI, M. NAGARAJU |
0482-0486 |
Download | |
IJVDCS 93 | Voltage Controlled Oscillator for Timing and Frequency Control Circuit Authors:NIVEDITA |
0487-0490 |
Download | |
IJVDCS 94 | Design and Optimization of Fir Filter using Multi-Bit Flip-Flop Authors:B. VIJAYA LAKSHMI, P. SYAMALA DEVI |
0491-0495 |
Download | |
IJVDCS 95 | Scalable Montgomery Modular Multiplication Architecture with Low-Latency and Low-Memory Bandwidth Requirement Authors:TOORPU RAGHAVENDER REDDY, CH. VIJAYA BHASKER |
0496-0500 |
Download | |
IJVDCS 96 | Low Power Digital Micro-architectures for High Speed Serial Links Authors:PREETI RANI, RUPESH SINGH |
0501-0505 |
Download | |
IJVDCS 97 | Implementation and Determining Various Structures of SRAM Cell Using Monte Carlo Simulation Authors:SHIVALILA, LAKSHMI DEVI. T. R |
0506-0510 |
Download | |
IJVDCS 98 | Low Power Test Generation by Skewed Load Test Cubes Based on Functional Broadside Tests Authors:A. PAVANI, A. RAM KUMAR |
0511-0515 |
Download | |
IJVDCS 99 | Energy and Area Efficient Three-Input Full Adder with Systematic Cell Design Methodology Authors:R. SRAVANI, DR. M. V. SUBRAMANYAM |
0516-0519 |
Download | |
IJVDCS 100 | Built In Self Test using Input Vector Monitoring System Method for Auto And Manual Testing Authors:S.M SUBAHAN, GUMMANUR RAJASEKHAR |
0520-0523 |
Download | |