| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 101 | VLSI Implementation of Low-Power Pulse-Triggered Static Flip-Flops On Single Feed Through Scheme Authors:HIMAYTULLA SHAIK, K.KISHORE KUMAR |
0524-0532 |
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| IJVDCS 102 | Design of an I2C Master Interfacing with APB Bus Authors:PARIKI MANASA, B. PADMINI, S. NAGI REDDY |
0533-0535 |
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| IJVDCS 103 | Optimizing Architecture of DSRC Device by using Component Reuse Authors:PALNATI SHIRISHA, K.KUMARASWAMY, S. NAGI REDDY |
0536-0542 |
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| IJVDCS 104 | Realization of Logic Functions using Reversible Logic Gates Authors:N.SRINIVASA RAO, P.SATYANARAYANA |
0543-0546 |
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| IJVDCS 105 | A Variable Delay Multiplier with Mechanism to Counter Aging Effect Authors:T.GOWTHAMI, M.AISHWARYA, S. NAGI REDDY |
0547-0551 |
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| IJVDCS 106 | Implementation of CMOS Based OTA Having Bandwidth at 65nm Technology for Low Power Applications Authors:MANOJ KUMAR TOMAR, OWAIS SHAH |
0552-0556 |
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| IJVDCS 107 | Implementation of A Low Power T-Gate Cell Library & Comparison With A Low Power CMOS Equivalent Authors:KANISHKA DE, CHRIS HUTCHENS |
0557-0561 |
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| Prev | 2 |
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