| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 41 | Design of Combinational Logic Circuits using Gate Diffusion Input (GDI) Techniques Authors:A. RANJITHA, J. KAMALA |
0214-0217 |
Download | |
| IJVDCS 42 | Realization of Reliable AES for Highly Secured Applications Authors:KONDAYYAPALEPU GOWTHAMI SUDHA, MEDISETTY NAGENDRA KUMAR |
0218-0222 |
Download | |
| IJVDCS 43 | Analysis and Design of a Low-Voltage Low-Power Double-Tail Comparator Authors:POOJA JOSHI, APARNA KARWAL |
0223-0226 |
Download | |
| IJVDCS 44 | Optimization of Power in Flip-Flop Group using Clock Gating and Power Gatin Authors:TASKEEN KAUR DHANJAL, APARNA KARWAL |
0227-0230 |
Download | |
| IJVDCS 45 | Design and Testing of Interconnect Faults in Cluster Based FPGA Architectures Authors:K. SOWMYASRI, J. KIRAN CHANDRASEKHAR, GOGA SUBRAMANYAM |
0231-0234 |
Download | |
| IJVDCS 46 | Ultra Low Power Design of Sequential Logic Circuits using Adiabatic Logic Authors:M.SHYAM SUNDAR, YASHPAL SINGH |
0235-0238 |
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| IJVDCS 47 | Design and Implementation of I2C Bus Controller using Verilog Authors:BOYA NARESH, P. VIJAY LAKSHMI, T. MAHESHWAR, DIWAKAR TIWARY |
0239-0241 |
Download | |
| Prev | 2 |
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