Submission Open for Jan-Dec-2024 |
Last Date of Submission : |
20th, April-2024 |
Acceptance Notification : |
After Peer Review |
Last Date of Publication : |
30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
S.NO | TITLE | PAGE NO | DOWNLOAD | |
IJVDCS 296 | Design and Implementation of Modified Wallace MAC Based ALU using Multi-Operand Adders Authors:TADALA SRISATYA, YANAMADALA APPARAO |
1505-1508 |
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IJVDCS 297 | Performance of Adaptive Hold Logic for Aging Aware Reliable Multiplier Authors:K.S.S.S.N.BHANU SEKHAR, K.RAMBABU, G.VASU |
1509-1514 |
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IJVDCS 298 | A Power and Area Optimized Aging Multiplier Design using Booth Multiplier Authors:THOTA JHANSI RANI, K. SANTOSH KUMAR |
1515-1518 |
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IJVDCS 299 | Realization of Low Power and Low Area MUX Based Multiplier Authors:BUKKURU MANI, B. VIJAYA BHASKAR RAO |
1519-1522 |
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IJVDCS 300 | Design of Reconfigurable NoC Architecture for Low Area and Low Power Applications Authors:B. RAVI CHANDRA REDDY, A. BALACHANDRA REDDY |
1523-1528 |
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IJVDCS 301 | Design of Pipelined Butterflies from Radix-2 FFT with Decimation in Time Algorithm using Efficient Adder Compressors Authors:LAMESSA DINGETA, GELAYE GERESU |
1529-1533 |
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IJVDCS 302 | Implementation of CAM for Compression and Decompression Applications Authors:Y. SIVA MANJILI, P. ESWARA RAO |
1534-1538 |
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IJVDCS 303 | Realization of Built In Self Test for Low Power and Low Area Applications Authors:GEDALA ANANDARAO, R. JAGADEESWARA RAO |
1539-1545 |
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IJVDCS 304 | Delay Efficient Implementation of Discrete Cosine Transform Architecture Authors:BOTCHU YOGEENDRA PRASAD, T. RAVI KUMAR |
1546-1551 |
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IJVDCS 305 | An Efficeint Time and Density Optimised QCA Adders for Stop Watch Designing Authors:K.VENKAREDDY, P.SRINIVASULU |
1552-1555 |
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