| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 279 | Low Power Implementation of Finfet Based Shift Registers using Power Reduction Technique Authors:KALYANRAM ISUKAPATLA, P.SOUNDARYA MALA |
1421-1424 |
Download | |
| IJVDCS 280 | Design and Implementation of Pulsed Latch Based Shift Register Using Body Biasing Techniques Authors:B.GOVINDA, K.VARAPRASAD |
1425-1428 |
Download | |
| IJVDCS 281 | Performance Analysis of Vedic Multiplier with Adaptive Hold Logic Design Authors:CHILUKURI VEERANJANEYULU, P.SOUNDARYA MALA |
1429-1433 |
Download | |
| IJVDCS 282 | Design of Efficient Carry Skip Adder with High Speed and Optimization of Delay Authors:BANDI DEVI, H.CHANDRASEKHAR |
1434-1438 |
Download | |
| IJVDCS 283 | Design of Efficient Han-Carlson Adder Authors:ANNAPURNA BAI, B. THIRUPATHAIAH |
1439-1443 |
Download | |
| IJVDCS 284 | Data Rate Analysis of LTE System for 2x2 MIMO Fading Channel Authors:PRATIMA SURYAWANSHI, PANKAJ MANOHAR |
1444-1448 |
Download | |
| IJVDCS 285 | Variable Latency Speculative Parallel Prefix Adders for Unsigned and Signed Operands Authors:K. LAKSHMI DEVI, DUDEKULA RAZIASULTHANA |
1449-1456 |
Download | |
| Prev | 5 |
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