Submission Open for Jan-Dec-2024 |
Last Date of Submission : |
20th, April-2024 |
Acceptance Notification : |
After Peer Review |
Last Date of Publication : |
30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
S.NO | TITLE | PAGE NO | DOWNLOAD | |
IJVDCS 249 | Design of GPS/Wimax/Wlan using Multiband Antenna with Different Frequencies Authors:R. SANDHYA, B. N. NAGAVENI |
1289-1292 |
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IJVDCS 250 | A Novel Approach for Design of Power and Area Efficient Carry Select Adder Authors:ANTHOTI SWATHI, KOLLIPARARAMYAKRISHNA |
1293-1296 |
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IJVDCS 251 | Implementation of Full Adder using Double Gate MOSFET with Gate Diffusion Input Technology Authors:ANNAPAREDDY NAGA SRILAKSHMI, AVULA GANESH |
1297-1300 |
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IJVDCS 252 | A Methodology and Approach to Floating Point using CLA & Booth Encoder Multiplier Algorithm Implemented in VHDL Authors:P. SIREESHA, R. ASHOK KUMAR |
1301-1307 |
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IJVDCS 253 | Functional Verification of Complex SoC by Advanced Verification Methodology Authors:G.RENUKA, V.USHASHREE, P.CHANDRASEKHAR REDDY |
1308-1312 |
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IJVDCS 254 | Application of FPGA Devices in Rom-Based FSM Implementation in Input Multiplexing Authors:ASRA SULTANA, TAZZEEN FATIMA, S.SUNEETA |
1313-1316 |
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IJVDCS 255 | Programmable Generator Producing Virtual Arbitrary Test Patterns Authors:ALWALA SRINIVAS, P.V.VARA PRASAD RAO |
1317-1319 |
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IJVDCS 256 | A Framework for Applying Same Filter to Different Signal Processing System Authors:GODHA SANTHOSH REDDY, P.V.VARA PRASAD RAO |
1320-1322 |
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IJVDCS 257 | Designing a Less Energy and Less-Size Shift Register for VLSI Circuit using Pulsed Handles Authors:RAJULA RAMU, P.V.VARA PRASAD RAO |
1323-1325 |
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IJVDCS 258 | A Wideband Inductor less Single-to-Differential LNA in 0.18μm CMOS Technology for Digital TV Receivers Authors:W.A.BHAWANI, K.RAVI |
1326-1328 |
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