| Submission Open for Jan-Dec-2024 |
| Last Date of Submission : |
| 20th, April-2024 |
| Acceptance Notification : |
After Peer Review |
| Last Date of Publication : |
| 30th, April-2024 |
Volume10 ISSUE 1 Volume1 ISSUE 1 Call for Conference Special Issue Archive (Recent Update ISSUE)
| S.NO | TITLE | PAGE NO | DOWNLOAD | |
| IJVDCS 263 | A Modified Artificial Bee Colony Based PTS Algorithm for PAPR Reduction in OFDM Signals Authors:B. SWATHI, M. NARAYANA, V. GURUMURTHY |
1528-1533 |
Download | |
| IJVDCS 264 | Design and Implementation of Dedicated Short Range Communication Application Systems Authors:K. SURYA KUMARI, G. DIVYA SRI |
1534-1537 |
Download | |
| IJVDCS 265 | MAC Unit Design using Multiplier & Ripple Carry Adder Authors:MINHAZ SULTANA, B. ARUNALATHA, P. RAMYARAJU |
1538-1540 |
Download | |
| IJVDCS 266 | Proficient Router for MPSoC using Open Core Protocol Authors:DHANYA M. RAVI, B. MANJULA |
1541-1545 |
Download | |
| IJVDCS 267 | Implementation of Data Encoding Technique for Network Interfaces Authors:P. SUNITHA, M. DIVYA BHARATHI |
1546-1552 |
Download | |
| IJVDCS 268 | Implementation of Double Precision Floating Point Multiplier Authors:C. V. KAVYA SUVARCHALA, B. SUKHADEV |
1553-1556 |
Download | |
| IJVDCS 269 | Low Power Pulse Triggered Flip-Flop Based On Clock Feed through Scheme using Transmission Gate Authors:R.SARVANI, G. SITA ANNAPURNA |
1557-1562 |
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| IJVDCS 270 | Design of Multiple Master/Slave Memory Controllers with AMBA Bus Architecture Authors:J. S. C. VARMA NAGARAJU, N. H. N. S. SRINIVASA MURTHY |
1563-1567 |
Download | |
| IJVDCS 271 | Implementation of Add Multiplier Operator Design using Modified Booth Recoder for Power Efficient Applications Authors:SANKU NAVEEN KUMAR, B. N. SRINIVASA RAO |
1568-1573 |
Download | |
| IJVDCS 272 | RTL Design & VLSI Implementation of Convolution Encoder & Viterbi Decoder Authors:K. RAMBABU, CH. PRABHAVATHI |
1574-1578 |
Download | |
