In-Field Test for Permanent Faults in FIFO Buffers of NOC Routers

Authors:VEDURUPARTHI SIVA KUMAR, P. SATEESH KUMAR

049-051

An Optimized Approach to the Synthesis of Arithmetic Circuits with Carry-Save-Adder Using Reversible Gates

Authors:PADAMATA ANUSHA, KARANAM RAMAKRISHNA

052-056

Design and Simulation of UART Serial Communication Module

Authors:MULLU SIVA TEJASWINI, V. RAVI TEJESVI

057-060

An Optimized Area And Power Multiplier Energy Reduction Through Bypassing of Partial Products

Authors:DASARI ANAND, K. GURUCHARAN, B. SANGEETH KUMAR

061-065

Functional Broad Side Tests for Embedded Logic Blocks

Authors:KORRA SRINIVAS, S. V. SUDHEER KUMAR

066-072

VLSI Implementation of Power Optimized Aging Aware Multiplier

Authors:KAKI MOUNIKA, PARASA SURESH

073-077

VLSI Implementation of CORDIC Algorithm for Processor Applications

Authors:YEDLA SATYANARAYANA, K. PRADEEP

078-084

Design and Implementation of A Parallel Turbo Decoder ASIC Using Hybrid Register Exchange Method

Authors:PRASANNA PALLI, S MALLIKA MATTAPARTHI, A.V.S.S.VARMA

085-089

Power Optimized ECC Design using Hamming Technique

Authors:BADRI NAGA DURGA, BH.V.D.JAGADEESWARI

090-094

A High-Speed Low-Complexity Modified 64-Bit FFT Processor using Radix-2

Authors:PALADUGU RAVI KUMAR, SUDAGANI JYOTHI

095-099